Microchip introduces the industry's most compact 1.6T Ethernet PHY

     By converting to 112G PAM4 interface rates, META-DX2L doubles the bandwidth of routers, switches, and line cards，Routers, switches, and line cards require higher bandwidth, port density, and connectivity up to 800 gigabit Ethernet (GbE) to handle increasing data center traffic due to 5G, cloud services, and artificial intelligence (AI) and machine learning (ML) applications. To deliver higher bandwidth, these designs need to overcome the signal integrity challenges posed by the industry's transition to 112G (gigabit per second) PAM4 serializer/destringer (SerDes) connections to support the latest pluggable optics, system backplanes, and packet processors.

     To overcome these challenges, Microchip Technology announced the industry's most compact 1.6T (terabits per second) low-power PHY (physical layer) solution, the PM6200 META-DX2L. Compared to its predecessor, the industry's first Terbit Premium PHY solution, the 56G PAM4 META-DX1, the new solution consumes 35% less power per port.

     Bob Wheeler, principal Analyst for The Network business at The Linley Group, said: "The industry is transitioning to the 112G PAM4 ecosystem to accommodate high-density switching, packet processing and optics. "Microchip's META-DX2L is optimized for 100 GbE, 400 GbE, and 800 GbE connectivity by bridging wire cards with switching structures and multi-rate optics to meet the industry's latest needs."

     Microchip's META-DX2L Ethernet PHY is an industrial temperature grade device with a high density 1.6T bandwidth and space saving size, but also uses 112G PAM4 SerDes technology to support Ethernet rates from 1 to 800 GbE for connectivity versatility. Design for maximum reuse in a variety of applications. These applications include retimers, transmissions or reverse transmissions, and interruptionless 2:1 multiplexers (Mux). Highly configurable crosspoints and transmission capabilities leverage switchgear's I/O bandwidth for the flexible connectivity required for multi-rate cards that support a wide range of pluggable optics.

     The PHY's low-power PAM4 SerDes enable it to support next-generation infrastructure interface rates in cloud data centers, AI/ML compute clusters, 5G and telecom service provider infrastructures, whether through direct connection to copper cables (Dacs) over long distances, backboards, or to pluggable optics.

     Babak Samimi, vice president of Microchip's communications business unit, said: "With the 56G generation, we introduced the industry's first terabit PHY, the META-DX1, and now we're launching an equally transformative 112G solution that gives system developers the capabilities they need to address the new challenges posed by today's cloud data centers, 5G networks, and AI/ML computing expansion." By delivering up to 1.6T of bandwidth and minimal size in a low-power architecture, the META-DX2L PHY doubles the bandwidth of existing solutions on the market while setting a new benchmark for efficacy."