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Ambarella launches AI domain controller CV3 series of SoCs, enabling ADAS and L4 autonomous driving with a single chip

Feb 8 2022 2022-02 Passive Components Amgis
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Ambarella released the latest AI domain controller chip CV3 series at CES. Based on the fully scalable, energy-efficient CVflow® architecture, the CV3 series of SoCs provide the automotive industry with the industry’s highest AI processing performance—up to 500 eTOPS, a 42-fold increase over Ambarella’s previous-generation automotive-grade SoCs, the CV2 series.

     Ambarella released the latest AI domain controller chip CV3 series at CES. Based on the fully scalable, energy-efficient CVflow® architecture, the CV3 series of SoCs provide the automotive industry with the industry's highest AI processing performance—up to 500 eTOPS of computing power, 42 times higher than Ambarella's previous-generation automotive-grade SoC CV2 series. Equipped with up to 16 Arm® Cortex-A78AE CPU cores, the CV3 is also 30 times faster than the previous generation chip, the CV2, in CPU performance required for software applications supporting autonomous driving systems. CV3 integrates multiple sensors on a single chip for centralized AI perception processing (including high-pixel vision processing, millimeter-wave radar, lidar, and ultrasonic radar), multi-sensor deep fusion, and path planning for autonomous vehicles. These outstanding performance help create ADAS systems and L2+ to L4 autonomous driving systems. The CV3-based AI domain controller enables superior environmental awareness even in harsh lighting environments, weather conditions and driving conditions.

 

     Wang Fengmin, President and CEO of Ambarella, said: "Our latest AI domain controller chip CV3 series, a single chip can run a complete set of ADAS systems and autonomous driving algorithms, providing unprecedented AI processing performance and extremely high energy efficiency. ISP, as well as the millimeter wave radar computing unit, CV3 can run Aoku's 4D imaging radar AI algorithm to help smart cars achieve a higher level of environmental perception accuracy under complex environmental conditions, helping autonomous driving become a reality."

 

     CV3 marks the debut of Ambarella's next-generation CVflow architecture, which continues the algorithm-first design philosophy. This drives the development of Neural Vector Processors (NVPs) in new architectures with up to 500 eTOPS of AI computing power, industry-leading energy efficiency ratios, and support for the industry's latest advancements in Neural Network (NN) inference. At the same time, the enhanced NVP can run advanced radar perception algorithms, such as the Aoku 4D imaging radar AI algorithm. Complementing this is the new floating-point general-purpose vector processor (GVP), which helps the NVP engine offload traditional machine vision and radar processing, as well as helping the Arm CPU offload floating-point-intensive algorithms.

     The CV3 series hardware platform structure is flexible and easy to expand, so that the OEM can make a unified plan for the software structure of its product series, which significantly reduces the cost and complexity of software development. The platform's scalability directly addresses the growing complexity of automotive software, providing an alternative to competitors' multiple fragmented ADAS SoC chip portfolios. In addition, the CV3 series can enable customers to upgrade online through OTA software, reserve computing power redundancy for the system, realize function iteration, simplify the software development process, speed up the progress of new functions and application deployment, and greatly shorten the time required for new models of OEMs. Development time.

 

     The CV3 chip family provides OEMs and Tier1s with different options for product strategic direction, from low-power SoCs suitable for forward-looking ADAS cameras that meet regulatory standards in the automotive industry, to high-end domain controllers that can be used for L4 fully autonomous driving SoC. This series of chips supports the central architecture as well as the regional architecture. In addition to covering the entire autonomous driving domain, CV3 can simultaneously handle in-cabin perception, including driver and in-car perception systems. Ambarella's AI vision SoCs offer a unique full range of products, supporting everything from ADAS assisted driving systems to L4 autonomous driving systems, covering a full range of applications in vehicle perception, recording and path planning. This means that OEMs do not need to develop different software for their different levels of automotive product lines, but directly use Ambarella's unified CVflow platform for development, which not only greatly reduces design and manufacturing costs, but also enables them to be put into the market more quickly to meet market demand.

 

     With a complete set of mature software tools and a powerful SDK, Ambarella's flexible CVflow AI platform provides customers with unprecedented product innovation opportunities to differentiate their products in the market. To maintain continuous growth in innovation, Ambarella has built an extensive software ecosystem for the CVflow platform, continuously ported and optimized applications, and worked closely with partners.

 

     The CV3 series is equipped with the latest generation ISP, continuing to leverage Ambarella's leading edge in image processing. CV3 can support more than 20 cameras connected by MIPI VC at the same time, only a single chip can handle a full set of sensors, such as typical L2+ autonomous driving sensor configuration (such as 10 cameras, 5 millimeter wave radars and a large number of ultrasonic radars). In addition, the CV3 chip features a high-performance binocular stereo vision engine and a dense optical flow engine to provide a wider range of depth detection and motion perception.

 

Key Features of the New Central Domain Controller Chip CV3 Series

1. Built-in GPU for 3D surround view rendering

2. HSM (hardware-level security) that supports security isolation of different domains and software information security deployment

3. Ultra-high bandwidth and low latency PCIe interface

4. Reserve performance redundancy for OTA software online upgrade and shadow mode data collection

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