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AMD unveils world's first data center CPU with 3D chip stacking

Mar 26 2022 2022-03 Sensors Analog Devices
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AMD announced the full launch of the world's first data center CPU using 3D chip stacking, that is, AMD 3D V-cache technology of the third generation AMD EPYC processor, codenamed "Milan-X". Based on the "Zen 3" core architecture, these processors further expand the family of third-generation EPYC processors and provide up to 66% performance improvements over non-stacked third-generation AMD EPYC processors for a variety of targeted technology computing workloads.

     AMD announced the full launch of the world's first data center CPU with 3D chip stacking, the third-generation AMD EPYC processor with AMD 3D V-Cache technology, codenamed "Milan-X". Based on the "Zen 3" core architecture, these processors further expand the 3rd Gen EPYC processor family offering up to 66% more power for various target technology computing workloads compared to non-stacked 3rd Gen AMD EPYC processors Performance improvements.

     The new processor features an industry-leading L3 cache, the same sockets, software compatibility, and modern security features as the third-generation EPYC CPUs, while also delivering exceptional performance for technical computing workloads such as computational fluid dynamics (CFD), Electronic Design Automation (EDA), and Structural Analysis. These workloads are key design tools for companies that need to model the complex physical world to create models to test or validate engineering designs for the world's most innovative products.

     Dan McNamara, senior vice president and general manager of AMD's Server Business Unit, said: "Building on our ongoing momentum in the data center and our many industry firsts, the 3rd Gen AMD EPYC processors with AMD 3D V-Cache technology demonstrate the Our leading design and packaging technologies allow us to deliver the industry's first workload-specific server processors with 3D die stacking. Our latest processors with AMD 3D V-Cache technology are critical Task's technical computing workloads deliver breakthrough performance, resulting in better product designs and faster time-to-market."

     Raj Hazra, senior vice president and general manager of the Computing and Networking Group at Micron, said: "Customers are increasingly adopting data-rich applications, which are placing new demands on data center infrastructure. Micron and AMD's joint effort The vision is to provide high performance data center platforms with the full capabilities of leading DDR5 memory. Our deep collaboration with AMD includes the preparation of AMD platforms based on Micron's latest DDR5 solutions, as well as AMD 3D V-Cache technology Introducing 3rd Gen AMD EPYC processors to our own data centers, we have seen performance improvements of up to 40%."

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